Hello. everyone. I am doing the simulation in Cadence(IC6.1.6). I need to calculate the power provide by the source.
In the simulation, I use both the vdc and vpulse in the libary analogLib with conductive load.
I used two ways to get the power.
1.rms
With the tran analysis, I measure the voltage and the positive terminal of the vdc and vpulse to get the current waveform.
Then I use the calculator to get voltage and current with the 'rms' function. Then the power = voltage(rms)*current(rms).
2.Average
Still with same way above.
But I use the calculator to get V and I with 'average' function. Then the power = voltage(ave)*current(ave).
I can see there is a big difference in these two results, sometime up to 20% or even more.
I can guess there are some reasons related to the phenomena.
It's negative and positive current flowing into the vdc or vpulse source. Negative current means the current provided by the source. And this part of power is the part I need to calculate. And the positive part is the power that are not provided by the source. Then I should negelect. Though in my case, there is not much influence in my results. Because the positive loss is quite small.
Another reason is that the real source should contain resistor. When I use the ideal source, it didn't contain with the resistor. I can see a extremely large current peak, like 1KV.
I have searched so much material to verify which one is right. But it seems different people have different evident to support their ideas.
It really confuses me.
I am using spectre as simulation tool , my design have 32 bit input pins how i can assign this bits with values
I use vector file but it works fine with single bit , when i increase radix more than 1 it fails
I use sitimulis file but it also fails
what is the most effective way to test 32 bit input pins in spectre
Thanks
Hi there,
I have recently re installed Orcad 16.6 onto a windows 8.1 machine. I cannot locate my env file. It does not appear within the pcbenv folder. The environmental variable %Home% exists and is linked to the SPB_Data directory.
Is there something I should have done or indeed do to make PCB Editor create this file.
Best Regards
Rob,
Hi I have OrCAD 16.2 suit installed on my PC which has Windows 7 professional with service pack 1. When I try to open some of my older fles it generates this COM Wrapper error occured. Can some one help with this problem. Thanks in advance
I am using IC 5.1.41 and Calibre 2010.4. I have an extracted view which is extracted by Calibre and I want to use it for post-layout simulation. When I modify the extracted view, Analog environment gives the following error:
ERROR: Netlister: the cellview **** was modified since last extraction.
Is there any way to modify an extracted view and use it for post layout simulation?
Thank you very much.
Hi all,
I am using Orcad Capture CIS 16.5.
Can somebody please tell me how to change the "do not stuff" value for components not present in variants of the schematic?
Hi,
I've done a quick search and nothing specific shows up (for me at least). If I want to borrow the licence from my work PC over the weekend to finish a design can I just re install orcad on my laptop including the licence file and also borrow the dongle?
Thanks
Rob,
Finally translait\\ting from 15.7 to 16.6, Should the package boundary be sized to the size of the pads , size of the part or whichever is bigger?What property does the constraints manager use to identify component to component spacing TIA
Hi,
I am using assura for LVS check, the version is : 4.1_USR1_HF12_514
There are errors like:
Error (AVLVSDF-10007) :No property 'modelName' is specified for cell 'pmos'. specify property 'modelname' in CDF for 'auCdl' simulator
Error (AVLVSDF-10007) :No property 'modelName' is specified for cell 'nmos'. specify property 'modelname' in CDF for 'auCdl' simulator
But in CDF editor, I can find the modelname for both pmos and nmos. What is wrong, how can I solve this problem?
Any advice is appreciated! Thank you.
Much like there are two symbols available for a resistor -- horizontal and vertical -- I have a second symbol for a part that I want to associate with the same package that already has one symbol associated with it. I have successfully created the symbol, but it is orphaned . . . it has no associated package (see attached image). I want to associate this new second symbol with the existing package. Have searched documentation and forums to no avail. Any suggestions?
Using Part Developer in Allegro DEHDL 16.5.
I've been doing it this way:
(when (dtpr (errset (status verboseLoad))) (sstatus verboseLoad t))
...through SKILL, not by doing, e.g. Options->Save Defaults and choosing "All Possible Tools".
One cheesy way I can think of is to do:
sh("find $CDSHOME/tools -type f -name \*.cxt > contexts")
Then foreach context file, call loadContext() on it.
I assume there's a better way......
Sir,
Is it possible to model a double exponential current pulse ( used for representing Single Event Itransients) in Cadence Virtuoso?. It would be helpful if you could explain the method for getting the same.
Yours faithfully
Aravind
Hi all,
I'm stuck on a simple issue but can't get out of it: I would like to generate severals waveform signals for my future testbench but the frequency of my signals are not correct.
Below is the code I want to simulate:
library ieee;
use ieee.std_logic_1164 .all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
use ieee.math_real.all;
entity triangle_generator is
generic(AMP: real;
OFFSET: real;
FREQ: real;
PHASE :real);
port(wave1: out real);
end triangle_generator;
architecture archi of triangle_generator is
signal tmp1 : real := 0.0;
begin
P1:process
constant delta : real := 1000.0e-12;
constant fin : time := 1000 ps;
variable angle : real := 0.0;
variable t : real := 0.0;
variable PHASE_RAD : real := 0.0;
begin
PHASE_RAD := (math_2_pi * PHASE)/360.0;
loop
angle := math_2_pi * FREQ * t;
t := t + delta;
tmp1 <= OFFSET+(AMP/2.0)*(2.0/math_pi)*arcsin(sin(angle));
wait for fin;
end loop;
wait;
end process P1;
wave1 <= tmp1;
end archi;
When I simule this code with FREQ=100 000 000 Hz I get the waveform in attachment, not really what I wanted. So I was thinking, if I write delta = 1000.0e-15 maybe it will be right, but absolutly not. When I change the value of delta, the frequency of the waveform is wrong.
So can you help me to get through this please?
I am trying to create scheatic using Allegro Design Entry HDL (Version 16.5). I am learning this software since 2-3 days and I need help on how to edit the schematic description like <DRAWING_TITLE_HEADER>, <PRODUCT>, etc. (Please find corresponding image attached) I tried going to Tools>Options>Custom Variables, but I could not find any of the fields (or variable list) that correspond to this. Any help related to this would be appreciated.
Hi,
Seems I had a design rejected from the board house because I was missing the board outline on my artwork. So I checked it out and it was only on the bottom etch layer.
Apparently they need the outline on each layer.
Using allegro 16.5, I went to the artwork window and saw that the subclass board geometry/ outline was missing on ALL of the films, even the bottom one. So I added it to all layers, including the mask and silk layers.
I also checked the photoplot outline. It's present and larger than the board itself by about 1/2".
I cannot change the width of the outline. It's zero.
I even futzed with the undefined line width and shape bounding box and no dice, still no outline except on the bottom etch layer.
Can someone give me a hand here? I am not an expert here but I have a ton of designs to get out stat, since I am the only one left here.
Thanks in advance
Hi!
I have to you the following question: how can I move the group of components or a single components by a defined offset? What should I type in the command window?
Best regards,
Krzysztof
Hello,
I would like to know some info. regarding Library files thaat are req for my CADENCE Project at nodes 90nm and 65nm.
what are the necessary files that i need to have when i mean 90nm library files for Encounter. My prof like to get them. SO i am eager to knwo what should be the files so that i will not get any errors when i import my design.
Please help me.
Let me know if you need more info.
Thanks,