How to know all the layers present in a PCELL
Dear ALL,I want to know all the layers present in a PDK cell.Is there any way ( by some skill code or command ) to know all the layers present in the CELL Kind Regards,
View ArticleTutorial for absolut beginners on schematic and ADE.
Hello!Where can I find a kind of tutorial for absolut novice on Cadence 6.15 Virtuoso Schematic and ADE (e.g. step-by-step description how to draw simple schematic and simulate it)?Does Cadence...
View ArticleMouse zoom in IC6.14
By default, when i scroll mouse wheel up and down, i get a view in schematic and layout going up and down. However, instead of that i want it to do zoom in and out.For example on mouse wheel Up...
View ArticleHow to make a program run as a non-blocking command?
Hey Guys, So I wrote a Skill program that spits back the XY coordinates in a text box for a symbol that is clicked on so that it can be easily copied and pasted (rather than highlighting it in the...
View ArticleWhen was SKILL++ first released?
I know it was after June, 1993.I know it was before SKILL 04.30 (IC441), which was 1997.
View ArticleOrCAD16.6 DRC Error: ERROR(ORCAP-2207): Check Bus width mismatch
Hi,When I run DRC. I receive below message at the end of report file, although I checked the whole design completely:Checking Misleading Tap connectionERROR(ORCAP-2207): Check Bus width...
View ArticleExtracted parameters do not match with the schematic.
I am using cadence 6.1.5 and UMC 90nm technology library. I am facing a problem with large deviation of extracted parameters of the devices.This is illustrated as follows. I have designed a CMOS...
View ArticleHow to find correlation parameter between two layout devices?
I have done schematic and layout of its design in layout XL. I use cadence 6.1.5 and UMC 90nm technology library. For a mismatch analysis I will be doing monte carlo simulation. I have to understand...
View ArticleNC-Verilog netlister setttings to output single netlist (not hierarchy-ihnl/...
Hi there, Apologies if this had been posted already. I have been successful at generating a single, plain Verilog netlist from a config view (including verilog, functional, schematics, etc. views) in...
View Articlemodel file
Hi Aandrew .as per your comment @ i have started that conversation in this new post. i hope this is the way you desired ? below is the question i had posted in the previous post related to this topic....
View ArticlePlotting the Phase Noise: *Error* quotient: can't handle (nil / 1.414214)
Hello friends I have simulated a VCO and I would like to plot phase noise after pss+pnoise simulation. But I face to this error: *Error* quotient: can't handle (nil / 1.414214)Could somebody help...
View ArticleDo we have any function to copy the cell (includes every view)
Hi experts, I need to find a function to copy the whole cell (include every view) by a single SKILL function. But all I found is the dbCopyCellView() to copy certain cellview. Besides I couldn't...
View ArticleFinding if a Cline is fully inside a Polygon(shape)
Hi GuysI have an unique problem to solve Imagine that your BGA ball has multiple dogbones connected to vias (through clines) and a bigger shape of same net overlapes it w.r.to Allegro this is fine and...
View ArticleHow to Characterize the timing information for level shifter with two supplys?
HI, All Now, I want to characterize a level shifter cell with two supplys by ELC of ETS11.0, but I have no idea to setup the voltage for the two supplys respectively,I only know how to set the default...
View ArticleSimulation parameters and tolerances
there are various Simulation parameters and tolerances listed in the simulation output of ADE-what is the meaning of reltol and gmin in the spectre simulation parameters? and for that matter vabstol...
View ArticleHow to use the thieving parameter in pcb?
I had worked on the pcb, but when i am try to put the set of free vias, i had used the parameter of theiving. When i am try to use it, that has been get enabled for single layer.How to use the...
View ArticleWhat is the best way to stream out a cellview that contains pcell instance
When I stream out the cellview that contains pcell install, i usually set the options with "Convert Pcells to Geometry" and "Convert Paths to Polygons" checked.But after streaming out and streaming in,...
View ArticleIs Bold Text Possible?
I know how to change my text, Edit > Change, and then use the options menu on the left. But, I don't know how to change the style of the text. I don't mind the font necessarily, but I want large,...
View Articlevoltage source
im working under sram cell design .i want to know which voltage source is used to change voltage from zero to vdd for read snm.
View ArticleMaking a Form with a Scrollbar?
I was reading through the Allegro SKILL Reference guide and noticed that VARIABLE formtypes are not supported. Is there some other way I can make a form with a scrollbar? I need to display alot of text...
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