how to stop the temp file generations in the project folder??
Hi.. When i am trying to update the net list three .dat files are been get executed. but with the three files unnecessarily the temp and log files are been get generated. Similarly when working on the...
View ArticleEditing the Etch width directly in the board file is possible ?
Hi.. I had tried to put the routing for the board. Before that the color dialog options and constarint manager settings too. But when i am trying to put the track between two points, the track is...
View ArticlePTH/NPTH Drill to Copper feature spacing issue
Hi , I am facing an issue in Drill to copper feature spacing.Due to my manufacturer requirment I need to have a minmum of 13.78 Mils spacing for any Drill(PTH/NPTH) to any other copper feature.I have...
View ArticlePTH/NPTH Drill to Copper feature spacing issue
Hi , I am facing an issue in Drill to copper feature spacing.Due to my manufacturer requirment I need to have a minmum of 13.78 Mils spacing for any Drill(PTH/NPTH) to any other copper feature.I have...
View ArticleVbit Source
Dear All, I'm using Vbit source to enter the following data pattern to a circuit as a stimulus p1 pattern data="10101" Why i didn't get a pulse wave and got the attached wave?, and how can i generate...
View ArticleTransient simulation - save state
Hi,I am a research scholar at IIT bombay, India. I have a long transient simulation running, which has frozen at 1.8us in a 10 us simulation. Is there any way to extract the state of the circuit and...
View ArticleCadance16.6 Shape symbol save error
Hi everybody,I am designing a shape in cadance16.6. There is a rectangular and half of a circle. I merged them and it became like below figure:...
View ArticleADE Cadence IC 6.1.5 Reliability Simulation
Dear All, I would like to know how the Reliability Simulation is working in cadence IC 6.1.5 , i enabled HCI, NBTI, and PBTI on an inverter and didn't see any difference between enabling or disabling...
View Article[help] pll simulation in spectre
I am trying to run a PSS analysis of a closed-loop PLL in spectre, but encounter converge problems.Is it possible to run a PSS analysis of a closed-loop PLL?thanks!
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Drawing path using SKILL
Hello, I have modified a SKILL file to draw a path from one point to another. However, this function takes two arguments: starting and ending point. I was wondering if it is possible to write the...
View ArticleCan't start up "Virtuoso Documentation" window
Hi Andrew, I can't start up "Virtuoso Documentation" window, it shows no errors & no warnings. The function called is ddsOnLineHelp('main) in VLS L...
View ArticleDid the environment paths can be edited in user prefernece option?
Hi.. i had found some tips and tricks for the OrCAD 16.3 editor. In that, they said some commands to work, but how can edit the define variables file in the user preference editor, and how can i save...
View ArticleFinding duplicate pins in schematic/Layout
I have duplicate pins in my layout and schematic but when i am acessing the pins duplicate pins are reported only once. I am trying to create text file listing all the pins in schemtic and layout....
View Articledx==0.05 is not true even dx is 0.05
Hi all,I have written below code for increasing metal widths of source and drain of every mos device in layout. This is because pcell default souce and drain metal widths are minimum. I don't want...
View ArticleIncluding HDL Libraries in Virtuoso 6.1.4
How can I identify the proper standard library for HDL (VHDL, VHDL-AMS, Verilog, VerilogA) and include it in Virtuoso 6.1.4 so that I can create Cell Views of type VHDL, VHDL-AMS, Verilog or VerilogA.
View ArticleSetting vhdl tb generic using irun command
Hi all,I've got a problem. In my tb I've got a generic: G_WAVEFORM_TYPE : string := "xxx" and i'd like to change "xxx" to "yyy" using irun "start.f" file, but i can't-mess -v93 -assert...
View ArticleEPS TMPDIR environment variable
My log file shows: "environment variable TMPDIR is '/tmp/" When in the flow should I:' setenv TMPDIR /user/me/tmp '...to prevent EPS from using the /tmp/ directory on our machines.
View Articlewhere to get model files for TSMC 0.18u CMOS018/DEEP (6M, HV FET, sblock)
Hello Experts,I have designed a circuit using the mosfets from this library TSMC 0.18u CMOS018/DEEP (6M, HV FET, sblock), now I want to simulate the circuit using the spectre, but I am in need of the...
View ArticleHelp with spectre stimulus file for sram read.
Hello Experts, I have a spectre stimulus file for SRAM read operation , but when i include the file and simulate via the spectre, I am not getting the expected results, can anyone check if my stimulus...
View ArticleHow to make a Panel Drawing in cadence Allegro editor?
Hi! can I ask how to make a panel drawing in cadence? I have multiple boards in cadence native file and I need to panel all boards in cadence allegro editor. After that generate a Gerber and ODB++ file
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