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Regarding Artwork option ??

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Hi eveyone,

i have some doubt for Leading and Trailing Zeros.instead of leading Zero if i choose trailing zero what will happen.what is the use of Gerber RS274x why should i choose that format .if i choose another what will happen ??

what is the use of CONTINUE WITH UNDEFINED APERTURE is it default settings 


[Spectre] Extracting model parameters for each Monte-Carlo iteration

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Dear wizards,

 

I need help to extract information about model parameters for each Monte-Carlo iteration in a Spectre simulation.

 The scenario is as follows:

  • Several Monte-Carlo iterations of a transient. 
  • The netlist contains bsim4-based models.
  • Mismatch parameters are extracted to a file via montecarlo parameters: savemismatchparams, mismatchscalarfile and mismatchparamfile.
  • I'm using Cadence-Spectre 5.1.4.

For now, I have circumvented the issue by adding a line just before the transient analysis:

   paramInfo info what=all where=file file="MC_MODEL_PARAM" save=all

it does what I want but it has two drawbacks:

  1. It slows down simulations A LOT.
  2. It appends all the model parameters one after the next one, for each MC iteration, in the same file.

Basically, I got the problem solved, but I would be interested in knowing whether it can be done in a similar way as mismatch parameters (which results in different files for each MC iteration)

 

 Thanks for your help!

 

Cheers,

Carlos

Design Entry HDL - Disabling Constraint Manager

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 Is there a method to disable the Constrint Manager from Design Entry HDL?

 

I was able to make changes to an existign design and generate a netlist; however, the netlist appears to be missing 2 Constraint Manager files ( error message received when netlist was imported). I believe this may be related to opening the Constraint Manager prior to saving my file.

 

 

 

ODB++

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We are having problems with the ODB++ information not matching the placement information or the IPC-2581 output. We have some parts placed on the board at strange angles and the output from ODB++ is 360 degrees different than the placement file and the IPC-2581 information. I have heard that it could be an ODB++ problem which comes from Mentor so I am not sure how to address this. Anyone have any suggestions?

external_driver_input_slew VS set_input_transition

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Arent those two commands doing almost the same thing for RC compiler?

Cadence schematic access permission issues with mounted folders

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 Hi,

We recently moved from a 'Samba' based remote file mounting to  "sshfs" based file mounting . After the migration, we are unable to open any schematic in the mounted folders with write permission.

Upon trying to open the files we get an error

('SCH-1217') : Could not open'schamtic' for edit.

(DB-270000)  dBOpenCellViewByType: Unable to lock  database file for  'filepath'

Would you like to open it for read?

 The native linux permissions of the mounted folders look good and we are able to read/write files into the mounted folders from the command prompt. Any clues on why virtuoso thinks the mounted folders as 'read only' when linux permissions are good??

Help on CONFORMAL LEC flow using Synopsys's Design Compiler netlist

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I'm trying to setup flow for using CONFORMAL LEC with DC netlist, and facing few problems in mapping.

--> Conformal doesn't map the RTL(async neg reset) with its counterpart  in netlist(DC). 

---> Conformal Doesn't map the "SNPS_CLOCK_GATE_HIGH" latch 

 **************my dofile is as follows (till it goes into lec mode)

     reset

    set log file <  >

     "sourcing project specific variables"

    set undefined cell black_box

      add notranslate filepathnames <  >

      add search path

      read library -verilog2k  

       read design -noelaborate -verilog2k -nosensitive  -golden <>

         read design -noelab -systemverilog -nosensitive -golden <>

      elaborate design -golden <>

      read design  -verilog 2k -revised <>

        set flatten model -nomap -latch_transparent -latch_merge_port -seq_constant -gated_clock -seq_redundant -nodff_to_dlat_zero -verbose

 set system mode lec

 

*******************************************************************

 

please provide me the basic flow for CONFORMAL--DC netlist

 

regards,

rafeeq

 

Procedural interface for Virtuoso schematic navigator

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I am trying to get the hierarchical list of instances that a net is connected to. I found two flows and both have issues:

 

  1. Schematic Navigator --> Select Net --> Right-Mouse-click on the net in navigator --> Probe --> Add net and connected instance
    • This works great and it probes all the instances the net is connected to.
    • However the geGetAllProbe() returns the probeId of the net. I can't get the dbId of instances connected to the net procedurally. Is there a better way to get these instance dbIds?
  2. auProbeAddDevsForNet()
    • This auLvs() functionality is broken. Works on certain schematics but fails on many.
    • I also tried setting the graphic env variable probeNetDisplayCheckInstance and this did not work
    • windowId~>probeNetDisplayCheckInstance = t did not work either
    • Is this function supported at all?

 

I heard probing has been enhanced in IC616 and I am yet to try this.

Any help or insight into this is greatly appreicated.

-- PSoorya 


Artwork form Control problem with film options

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 Hi all,

While I was finishing a pcb design I get into this issue trying to get the gerber files. The problem is that I am missing the "film options" tab on the Artwork form control, I tried to expand/compress the windows without any luck . Please could anybody help me to fix this? I never saw this issue before.

Cant alias this bindkey command

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Hi..

Can you please tell me what is wrong with this bindkey setting:

 hiSetBindKey("Layout" "Shift<Key>n"   leSetFormSnapMode("orthogonal"))

at the CIW prompt ,it returns t

But when I tried to use this bindkey, I got the error  p, li { white-space: pre-wrap;*Error* toplevel: undefined variable - orthogonal

 

However, if I change the synctax from orthogonal to anyAngle, it works fine.. (Why??)

Thank you very much for your help

Howard

 

 

Question on OCEAN standalone evaluation

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Hi,

Got a question on OCEAN scripts (same applies to artil as well)

I have an ADE L state, from which I save the OCEAN script, and then run it. It runs fine.

Suppose, there is a calculator function in this OCEAN script, which looks like this:

gain_1 = value(dB20(mag(v("/outp" ?result "ac-ac"))) 1)

plot( gain_1 ?expr '( "gain_1" ) )

Now, suppose I want to run the calculator function again (with possibly some modifications). Since the simulation is already run, I remove the entire top part of the OCEAN script, and replace it with a call to openResults, like below:

openResults( "results.psf" ) ; Replace "results.psf" with the actual path of the PSF directory

I run the OCEAN script, but it fails, with the following error:

> WARNING (OCN-6054): The output '/outp' you selected does not exist. Type outputs() to see the list

Now comes the funny part. I change the calculator expression to the following:

gain_1 = value(dB20(mag(v("outp" ?result "ac-ac"))) 1)

That is, I removed the "/" character in the signal name. The script now runs fine!

Could anyone tell me why this happens? I know the workaround for it, but would like to understand why that workaround is necessary at all.

Copying cadence library and changing cell names and references

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Hi,

I want to copy my present working library to a new one and while doing the same i want to change the cell names (only prefix eg A_GIO TO B_GIO) .While doing the same i also want to make sure that the library reference will be updated to the new one and the heirarchy is maintained.

Can some one give me an input on how to do this quickly. 

Regards

Vipin 

 

 

editing input.scs not working

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Hi folks,

I'm running 6.1.5 and I ocasionally need to edit the simulation netlist (for example, to comment out a parasitic capacitance to debug). In the "old days" you would edit the input.scs and then hit simulation ->run and it would run without generating a new netlist. However, with this version it doesn't always use the input.scs - it seems to have one in memory that it uses. That is, if I go to simulation->netlist->display netlist I get the input.scs file that I modified, but the simulation uses the old one. (Editing the file "netlist" doesn't seem to help either.)

Occasionally I can get it to use the modified one, but I'm not sure exacly what I did to get it to do that. It is difficult to debug when you don't know what netlist is being used! So, what netlist is being used? How do I get it to use one that I've modified? 

 

Thanks, this problem is quite frustrating.

Rob

 

 

pCell skill for beginners

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Hi,

i'd like some advice for creating my first simple pCell from skill. I have no skill experience so i'm looking for a good place to start.

My ultimate aim (for now) is to create a rectangular via array with X and Y stretch handles. For example you have M1->M4(the top & bottom layers would be parameters) that you can stretch in X or Y and it fills with the max vias allowed by spacing rules. However to begin with i'd be happy to create a parameterised rectangle of M1 that i can stretch in one direction & take it from there.

Pointers to on-line tutorials and very simple examples would be great, right now i am blindly searching around source-link.

Thanks

Stu

how to search for specific devices/models into spectre netlist?

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 Hi there,

 I want to know if it is possible with SKILL functions to scan a spectre netlist for specific devices.

We have a spectre netlist file and we want to search for devices of a specific model or devices with specific properties (e.g. w < 0.XX um ).

If such devices/instances are found  to warn the deigner:

            In cell ABC we found device D (model=model_X, w=0.zz )

And based on those info he shoudl decice if really want to run the simulation of not.

 

 Do we have such things in SKILL?

I want to run it from command line, some other scripting is OK if SKILL has no such functionality.

Best Regards,

Marcel


alias or funckey

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I'd like to assign a key to toggle betwreen general/etch/placement with alias or funckey.

Is it possible to have a key toggle something like that?

 

 

Copying components from design cache to library removes user defined properties

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Hi, I'm running OrCAD Capture (no CIS) version 16.6 and having some trouble.

Here's my scenario ... I create 3 resistor symbols in a library named "R 10R", "R 100R" and "R 1k". After placing these 3 symbols on a schematic, I select all 3 and click "edit properties". Add in a few custom fields, "Internal Part Number", "Manufacturer", "Mfr Part Number", etc... I do this in the property editor because it's much more convienent than using library editor, where I have to individually edit these properties. Then I copy the symbols from my design cache back into my library and check the part properties and all my custom fields are gone. I also tried first removing the parts from the library, saving, then copying from my design cache into the library and the fields are still missing.

Am I doing something wrong? Is there another way of doing this that lets me modify multiple parts at once in the property editor?

Please note that my example is just a simple scenario, when I need to add more than a couple of components it becomes very time consuming to add each custom field to every part I need to create. 

Pipe-sign every time I execute

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Hi All, I have a simple function (nothing fancy) whose header definition is as below:

procedure( my_func( cellName netName @optional (arg1 "abc") (arg2 "def")  )

    let(  (inport...etc. ec.

I have two questions:

(a) Everytime I execute the function, I get a "|"<process_name> at the start and end, as shown below:

my_func( "mycell" "mynet")

|my_func("mycell" "mynet")

..................... 

|my_func --> t

(2) How do I pass arg2 without having to pass arg1? Something like my_func( "mycell" "mynet" ?arg2 "myarg")  

Logic Design Forum Posting Guidelines

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Thanks for being part of the Cadence Community. Below are a few guidelines on using the forums.

  • Use descriptive subjects. "Problems with LEC mapping" is good. "Need help” isn’t.
  • Please start new threads for new topics. Don’t reply to existing threads with unrelated discussion. This helps users scan posted topics.
  • Helping other users is greatly appreciated by the community.
  • Searching http://support.cadence.com is good resource to get answers and file Support tickets.

Don’t forget to let others know about the Community Forums. http://www.cadence.com/community/forums/31.aspx

 

-ts

cadence version 16.6. anyone having problems with this version

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About to install v16.6, does anyone have any problems with the new version that I need to know? Appreciate any feedback.
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