Hi,
I want to do the following 5 times with a new schematic view every time:
1. Run a simulation
2. Switching schematic view on one cell in the config file and re-run
Any one have a good advice on how to do this in ADEXL? I could create 5 tests with 5 different config files? Or is a Cell View restricted to only 1 config file?
Just wanted to share my solution to this common problem.
(defun nub (l "l")
(let ((table (makeTable "" nil)))
(foreach e l table[e] = t)
table->?))Output:
(nub (parseString "Banana Rama" "")) => ("a" "m" "n" "R" "B" " ")This assumes order doesn't matter. If order does matter (and efficiency doesn't...), you could use this O(n^2) version, which is a literal translation of the one in the Haskell Data.List library:
(defun nub (l "l")
(defun _nub (xs ls "ll")
(unless (null xs)
(destructuringBind (x @rest xs) xs
(if (member x ls)
(_nub xs ls)
(cons x (_nub xs (cons x ls)))))))
(_nub l nil))Output:
(nub (parseString "Banana Rama" "")) => ("B" "a" "n" " " "R" "m")If you want to preserve order and get O(n) performance, you could modify the last version to use a table instead of a list:
(defun nub (l "l")
(defun _nub (xs ls "lo")
(unless (null xs)
(destructuringBind (x @rest xs) xs
(if (ls[x])
(_nub xs ls)
(cons x (_nub xs (ls[x] = t && ls)))))))
(_nub l (makeTable "" nil)))Output:
(nub (parseString "Banana Rama" "")) => ("B" "a" "n" " " "R" "m")
Hi Experts,
Does ic5141 have any S&R utlility? If yes where can I find it?
I also need a SKILL script that would place all the symbols in a library into one schematic. Here is the description of what I need:
The script will put the symbols for all IP’s in a schematic cell.
The call should be something like:
CreateAllIPinOneSchematic(“srcLibPattern”, “trgLibName”,“allIPinoneSchematicName”)
It should search for all libraries starting with the string matching the srcLibPattern and put all the symbols of the cell that has the same name as the library in a schematic called “allIPinoneSchematicName” in Library“trgLibName”.
Can I get SKILL for this? Or some pointer will help.
Regards.
Ash
Hi,
I have created a small tcl script to modify the some properties on the Title Block. I wish to add the Script to the TCL/Tk Applications Dashboard.I followed the instructions in the OrCAD_Capture_TclTk_Extensions.pdf. I have added the script in the folder “C:\Cadence\SPB_16.5\tools\capture\tclscripts\capUtils” and modified the file capApps.tcl in the “C:\Cadence\SPB_16.5\tools\capture\tclscripts\capForms”folder. I restart my Orcad Session, I can see the entry in the dashboard. However, upon clicking on ‘Launch’ I get the error "error ::capTitleBlockEditUtil::EditTitleBlockOnPage not defined"
my script is ::
package require Tcl 8.4
package require DboTclWriteBasic 16.3.0
package provide capTitleBlockEditUtil 1.0
namespace eval capTitleBlockEditUtil {
namespace export EditTileBlockOnPage
}
proc capTitleBlockEditUtil::EditTileBlockOnPage {} {
set lSession $::DboSession_s_pDboSession
DboSession -this $lSession
set lStatus [DboState]
set pDesignPath C:/ecad/staging/vila/bimu_1405135821/orcad/latest/0010/test.dsn
set lDesignPath [DboTclHelper_sMakeCString $pDesignPath]
set lDesign [$lSession GetDesignAndSchematics $lDesignPath $lStatus]
set pSchematicName SCHEMATIC1
set lSchematicName [DboTclHelper_sMakeCString $pSchematicName]
set lSchematic [$lDesign GetSchematic $lSchematicName $lStatus]
set pPageName PAGE1
set lPageName [DboTclHelper_sMakeCString $pPageName]
set lPage [$lSchematic GetPage $lPageName $lStatus]
set lTitleBlockId [$lPage GetTitleBlockDisplayed $lStatus]
set Titile [$lPage GetTitleBlock $lTitleBlockId $lStatus]
set pPname Title
set lTitlePName [DboTclHelper_sMakeCString $pPname]
set lNameValue [DboTclHelper_sMakeCString]
$Titile GetUserPropStringValue $lTitlePName $lNameValue
puts [DboTclHelper_sGetConstCharPtr $lNameValue]
set pPropValue CHANGED
set lPageName [DboTclHelper_sMakeCString $pPageName]
$Titile SetUserPropStringValue $lTitlePName $lPageName
}
I've written a skill code that is supposed to change one of the pin names of a given cell from an old value to a new one in the schematic and symbol views. It works well on the surface but gives a warning that I have to fix: the pin name gets changed as wanted in both views but there's a warning that the pin list of the symbol does not match the pins on the symbol. In other words, although the pin on the symbol is changed, the pin name in the pin list is unchanged and I'm stumped as to how to reconcile the two.
Here's the code and if anyone has any insights on this issue, please let me know:
/* To be run on a single cell; the cell will have to be checked out first; lib and cell will be provided as argument*/
procedure(cellChangePinName(myLib myCell oldName newName)
let( ( myInstList myInstances myInst mycv myListOfNets myNet)
;cv=geGetEditCellView()
if(!dbOpenCellViewByType(myLib myCell "schematic" "schematic" "a" )==t then
printf("\nCell is unwritable, make sure it's checked out and try again\n")
else
mycv = dbOpenCellViewByType(myLib myCell "schematic" "schematic" "a" )
;mycv = dbOpenCellViewByType("temp_brou" mycv~>cellName "schematic" "schematic" "a" )
myInstList=nil
myInstList = setof( myInstances mycv~>instances myInstances~>pin~>term~>name == oldName )
;myInstList = setof( myInstances mycv~>instances myInstances~>pin~>term~>name == "VDD" )
if(length(myInstList)==0 then
printf("\nThere are no pin names of that name in the schematic of this cell:\n%s......%s/%s\n" oldName myLib myCell)
else
foreach(myInst myInstList
myInst~>pin~>term~>name = newName
;myInst~>pin~>term~>name = "VDD_brou"
myListOfNets=setof(myNets mycv~>nets myNets~>name==oldName)
foreach(myNet myListOfNets
dbMergeNet(dbMakeNet(myNet~>cellView newName) myNet~>term~>net)
myNet~>name=newName
);foreach
);foreach
schVIC(mycv)
;dbSave(mycv)
dbClose(mycv)
);if
);if
if(!dbOpenCellViewByType(myLib myCell "symbol" nil "a" )==t then
printf("\nCell is unwritable, make sure it's checked out and try again\n")
else
mycvS = dbOpenCellViewByType(myLib myCell "symbol" nil "a" )
myInstList=nil
myInstList = setof( myInstances mycvS~>shapes myInstances~>pin~>term~>name == oldName )
if(length(myInstList)==0 then
printf("\nThere are no pin names of that name in the symbol of this cell:\n%s......%s/%s\n" oldName myLib myCell)
else
foreach(myInst myInstList
myInst~>pin~>term~>name = newName
;myInst~>pin~>term~>name = "VDD_brou"
myListOfNets=setof(myNets mycv~>nets myNets~>name==oldName)
foreach(myNet myListOfNets
dbMergeNet(dbMakeNet(myNet~>cellView newName) myNet~>term~>net)
myNet~>name=newName
);foreach
);foreach
schVIC(mycvS)
;dbSave(mycvS)
dbClose(mycvS)
);if
);if
);let
) ;proc
Hi all !
I'm trying access to padstack definition & get height and width values of regular pad, but I don't know how to do it. I only found some attributes likes drillDiameter, objType..... Please help me do that.
Luan.
Tks.
We used this command in training class so I know it works...........
I'm trying to use it on a new design. I have four "rooms" and the associated components "quick placed" into those rooms. In one of the rooms, I have placed the parts in the order I want them.
According to the instructions I have, in placement edit mode, select the placed components, hover over one of the selected parts and RMB. The pop up menu should have the "place replicate create" option, but mine does not. I get a menu with "align components", "unplace component", "show rats", etc....... No replicate option.
What am I doing wrong? Like I said, I used this command in training and I'm following the instructions we were given.
Tom
I have added a flash symbol for the thermal relief while creating the pad but it is not getting displayed in the PCB Editor.
Any help is great.
Thank You.
I am trying to export a layout to a GDS file in batch mode. I used to run PIPO STRMOUT command for IC5.14 but it seems this command no longer exists for IC6. I am wondering what is the proper command and what is the syntax?
Thanks
Hi,
I've just been given a computer at work for use with OrCAD 16.6 (PSpice in particular). The OS is Win XP 64 bit (XP Pro x64 V2003 SP2).
Is this a complete non-starter?! I've read that OrCAD does not support XP 64.
I'd be grateful if someone could advise me whether I need to reinstall with XP 32 bit.
Thank you,
Nick
Hi,
I've had OrCAD 16.6 up and running for a few days. I'm interested in the PSpice 64 bit probe data. (I believe this does not require a 64 bit operating system).
Are the internal calculations done 64 bit too?
Thank you,
Nick
Is there a function similar to geGetEditCellView() that will return the string value of the current cell view, as opposed to its database ID number?
For example, I have a layout view open called "MyLayout". If I use dbFullPath(), it will give me the full path to "...MyLibrary/MyLayout/layout/layout.cdb", but I only want the string "MyLayout" returned.
Sorry if this seems remedial. I am having no luck finding such a function....
Hi All:
Hopefully Dave Elder reads this ?
I am running Allegro 16.5 S018 and tried to run the autosilkUtils.il SKILL script.
Everything seems to work except it does not put the DRCs into the walker popup window.
Hopefully someone can fix this ?
This is a great tool
Thanks,
Les
As I'm approaching finishing my first pcb design using 16.5, I have a few questions concerning netlist generation and loading into the board file.
Throughout the board design process, there are occasions where I will need to change the schematic necessitating a new load of the netlist. Coming from the 16.2 and older generation, all I would need to do was "autoECO" the new netlist into the pcb file and keep on trucking.
The process in 16.5 I have to follow is this: (Starting with both Capture and PCB Editor open)
Close PCB Editor
Select the Netlist command in Capture
Pick my board file
Input my output file
Select "Open board in PCB Editor"
Select OK
This will generate the netlist and open the board in Editor. This seems to be more "manual" then in previous (16.2 and prior) versions. I was not expecting to have to close PCB Editor and manually input the new board file name.
So this begs the question, am I doing this the hard way? Can you have the netlister run while the board file is open AND increment the file name? Older versions would automatically append a -1, 2, etc.... to the board file name.
Tom
Dear All,
I was trying to simulate my circuit (using PSS/PNOISE) which has mixer for downconversion.
The clock for the mixers are coming from another circuit block.
When I simulate with my clock source circuit it takes a lot of time to simulate the PSS.
So I want to simulate the clock source separately and capture the output waveform in a .PWL file.
This .PWL file I want to feed the main circuit for doing PSS/PNOISE analysis.
I am confused how it will work. Can anybody tell how this way of simulation will work with PSS/PNOISE. How this will affect the accuracy of the PSS/PNOISE simulation.
Kind Regards,
Hello. I would like to add an image to my post. When I choose "Insert/Edit" image I need a URL for the image. I was hoping to select the image locally and upload it.
I made this connector footprint which requires solder pads around the perimeter to hold the connector to the board. They are on shapes on the etch layer with solid fill, but they always show as outlines with dots inside. Even when doing the artwork preview.
Will they come out as solid copper pads in the gerbers?
Tom
Good morning all,
I tried to translate an old board, but some footprints get the "_" removed from the name. I believe this is because the names are more than 31 characters. I know how to change this in a design, but do not know how to/or if it can be changed in the translater. Any help would be appriciated.
Thanks,
Ken
Hello all,
Can anyone tell me how to turn on the "Enable DRC By-Layer" in the same net spacing constraints tab under all layers-->all?
Thank you in advance!
Is there a way to do this?
I'm looking at a schematic deep down in the hierarchy. I select some components. Is there a way to copy this to a "clipboard" - cadence-specific?
What I'd like to be able to do is then return-to-top and paste this selection.
Thanks