Autoroute problem
Hello everybody,I have designed a schematic in OrCAD Capture CIS and then created netlist. And then I am able to open the file in OrCAD Layout Plus. But on selecting Autoroute Spectra-->Launch...
View Articleultra pcell with dbCreateParamInstByMasterName
Hi All,I am creating a ultra pcell consists of pch_fet cell (pcell) using dbCreateParamInstByMasterName. The pcell has "l" and "w" parameters. While Instantiating the ultra pcell with required l and w,...
View Articlepnoise and pac contradiction
Hi,First I want to know hoe does spectre compute flicker and thermal noise1) using a current modelbetween drain and source2) using a voltage model at the gateI am using BSIM 4.5 models where doc says...
View ArticleRegarding more DRCs at routing for 28nm designs using routeDesign command...
Hi,Iam working on 28nm design using soc encounter with the following steps,Placement -> prectsopt -> CTS -> postcts_opt for setup and hold -. routing -> postroute opt 1)Iam using padding...
View ArticleStandard way to report/calculate leftover space on the board?
I don't have much faith in this method personally, but I'm facing the expectation that we report the space occupied by parts relative to the overall size of the board.It's great that I can query the...
View ArticleMinarea violation in SOC encounter
Hi, I want to know what "Minarea violation" is, and how can I solve it?? I have 3 Minarea violations in Geometry verifying by SOCencounter... thanks alot
View ArticleGate Level Sim - SDF annotation debug
Hi, I am trying to annotate an SDF to my gate level synthesis netlist and I am seeing some strange behaviour. When I annotate using just the netlist, cell_lib and sdf , everything works fine. However,...
View ArticleDesign partition in soc encounter 10.1
I am new to soc encounter, Can anyone guide me how to do the design partition flow. Due to lincese problem It does not read the Power domain (Low power) commands, MSMV and cpf file. The design TOP has...
View ArticleAdd space to the top and bottom of standard cells
Hi all,In my design, if two cells of a specific cell type are stacked on the top of each other, a lower layer is shorted.Is there anyway to add space to the top and bottom of kind of cell...
View ArticleDesign is tight after placing cells
Hello After placing a design all the cells are concentrated in one place, the tool takes a very long time to finish and after a lot of iterations I have geometry and shorts violations.I set the Clock...
View ArticleUpon netlist import, SIGNAL_MODEL proberty getting deleted.
Part of the process to create xnets is using the SIGNAL_MODEL property.are created in Allegro. Normally we are able to rename all components, delete the SIGNAL_MODEL property, and back-annotate to...
View ArticleADE XL remains in "pending" state
hello,i decided to try ADE XL as i wanted to run temp/corner sweeps. i was able to set everything up, but when i start the simulation, it just sits in "pending" state until the sim times-out. has...
View Articlechange the line font of a rectangle?
Hi all,I am trying to create a rectangle, using axlDBCreateRetangle, but there does not seem to be an option for line font. I want to use PHANTOM. Is there a way to change the line font in skill? I...
View ArticleHow do I properly format a imported properties file into SKILL to create shapes
I wrote a simple SKILL script which pulls the properties off a shape and prints into a text file.LayerPair: ("m1" "drawing") ShapePts: ((0.0 0.0) (100.0 100.0))PropertyName: Name PropertyValue: "p3"...
View ArticleaxlDBCreateShape attach to via?
HiI've used axlDBCreateShape and attached it to a symbol with succes in the past.Now I would like to be able to do the same for a via but seems like this is not possible or is there a way to do...
View ArticleViVA setting to remember waveform setup
What is the procedure to set the ViVA so that everytime after simulation is done, the previous waveform display format, such as signal order, signal groups,... is the same as before? By default it uses...
View Articleultra pcell with dbCreateParamInstByMasterName
Hi All,I am creating a ultra pcell consists of pch_fet cell (pcell) using dbCreateParamInstByMasterName. The pcell has "l" and "w" parameters. While Instantiating the ultra pcell with required l and w,...
View ArticleHow to deposit simulation result into a file?
Hi, I am wondering is there a way to save an output into a file, like a .txt which it is easy to read from. Specifically, in the "Setting outputs" of Virtuoso Analog Design Environment (ADE) I have:...
View Articlesimulation run time
Hi, I have a ocean script that I saved from ADE. How can I record the time it takes for the simultion to run so that I can write it to a file? Thanks,Milind
View Articlebindkey definitions issues
Got a little problem here. I have a massive set of custom bindkeys defined - these have worked fine for years (with a little process dependant tweaking)... Recently started a new process - and moved to...
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