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Skill to change Via

 Hi all,           I am at Beginner level in Skill code.  We tried a code to change the via by using Skill funtions. The code is as follows,  procedure(CCFchangeViaDef(ViaDef1 @optional (listOfviaDef...

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envSetVal

Hi All,I wanted to change e.g.  my xSnapSpacing value from .005  to .05 in skill mode       envSetVal("layout" "xSnapSpacing" 'float 0.05)the command above returns t but it does not immediately takes...

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Annoying message about OS compatibility and SKILL problem

 Hi all,I have two questions, please can you give me an advice? The first:  Please how can i suppress the annoying message about operational system compatibility with DFII? In concrete i talk about...

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Skill Command for dumping library?

Is there a Skill version of the dlib command? I want to be able to call it as part of my program but fill in the selection criteria without user input because my program will sort and move the data...

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How to calculate input equivalent capacitance of 2 ports network.

Hi everyone,I am a newbie in Cadence spectre simulator. I have a two ports network and I try to plot the input equivalent capacitance vs. frequency. In ADS I use equation: Cin = imag(Y11)/(2*pi*freq)....

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To get extents of place bound shape of a part

axlVisibleDesign(nil)axlVisibleLayer("PACKAGE GEOMETRY/PLACE_BOUND_TOP" t)axlVisibleLayer("PACKAGE GEOMETRY/PLACE_BOUND_BOTTOM" t)  ; MAKE A LIST OF BGAs USING THE SYMBOL LIST    foreach(symbols...

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How does spectre read the value of each parameter from the spice model file.

  Normal 0 false false false EN-US X-NONE X-NONE MicrosoftInternetExplorer4 /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0;...

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Monte Carlo simulation takes 3x longer than corner sim

 I have a circuit in tsmc 28nm, the design is in cmos logics, the regulator corner simulation takes 13 hrs each, however the Monte Carlo sweep runs much longer, each run takes 3x longer.  The following...

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cds_thru unbound

Dear All,In LVS i get this error *ERROR* Device 'cds_thru(RES)' on Schematic is unbound to any Layout device.IC sub-version 5.10.41.500.6.143 Assura sub-version 4.1_USR4How to fix this error?Regards  

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Place Replicate Unmatch!..

Hi,I am designing my PCB with 16.6. I placed components of a Room and made a replicate module. When I try to apply replicate to other similar Rooms, "Unmathced Component Interface" dialoge appears and...

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Importing multiple gds

Hi All,I wanted to import multiple gds files at a time . I was searching for a SKILL command for same and could find only absImportGDS. Is there any way around to do import multiple gds files at a...

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Difference between netlist of PADS2K.dll and PADSPCB.dll

Dear all, Do you know what the difference between the ORCAD netlist output format of PADS2K.dll and PADSPCB.dll is? Thank you. 

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Layout Porting between Foundries

Hi All,   Is It possible to port an existing layout from Foundry1 to Foundry2. Consider the existin layout has only metal & Via layers.Thank You,Kumar

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How to convert Wire to a Geometric wire

It was requested that I should use "geometric wire" instead of "wire", problem is I was using "wire" for routing from the beginning it will be a lot of work wasted if i re-do the routing. Is there a...

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Replace off-page connector by Hierarchical Port - Allegro Design Entry CIS 16.6

Hi,I've schematics with 1000s of off-page connector, i wanted to replace all the off-page connectors in the design with Hierarchical port connection. I'm in the process of changing exisitng complex...

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Import Synthesized Verilog Netlist to Virtuoso

I am trying to import a synthesized verilog netlist to virtuoso (IC615). The problem I have is, the standard cells are missing. I do not know what library file I should add to the library manager, as...

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Drill hole size minimizing in NCdrill Parameter

For my board file, i had placed the NC drill legend below the board. After that in case i want to minimize or maximize the drill sizes in the drill parameter is not get edited. In case of layout, the...

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Component Height Report issue

I wrote a component height report that works, except it outputs multiple entries for each part. How can I get it to report just once for each part. Here is the report script.# This is an extract...

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script to run IRUN

Dear, I am trying to run (IRUN) script to generate a vcd file inside many folders so my script is like that :-----------------------------------------------------  #!/bin/tcsh#created @aa835# script to...

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ELC not using spectre

ELC seems to always read in files as spice format even though I have "simulator lang = spectre" without the quotes at the top of every .scs file.  In addition I have:set_var EC_SIM_NAME...

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