Dear all,
I have a AND-OR structure written in RTL in a module. After the synthesis I see that the same logic is implemented using different logic elements in different modules. In one module I see AND-OR is formed with 4 instances, in other module with 5 instances.
Is there a way to tell RC to use exactly the same AND-OR structure in different modules, that are using same piece of RTL code?
Thanks,
Aram