Error with Assura QRC using IBM 0.13um SiGe

Hi,

I am using cadence verion:ic613

and Assura4.1-613 and ext 9.14

I can run Assura DRC and LVS fine but when I run QRC I get the following error.

Please help me solve this error.

Thanks

Sriram

Cadence Extraction QRC - Parasitic Extractor - Version 9.1.4-p003 Thu Sep

16 19:40:23 PDT 2010

---------------------------------------------------------------------------------------------------

INFO (EXTQRCXOPT-249) : For Assura inputs, if the "output_setup -directory_name" option was not

specified, it is automatically set to the input directory.

INFO (LBRCXM-624): No temperature processing will occur for the layer QY, because this layerhas no Tc1 and Tc2.

INFO (LBRCXM-624): No temperature processing will occur for the layer HY, because this layerhas no Tc1 and Tc2.

INFO (LBRCXU-108): Starting

/cad/cds/assura4.1-613/tools/assura/bin/rcxToDfII /home/rhome/murals3/bicmos8hp/simulation/mim_cap/__qrc.rcx_cmd -t -f /home/rhome/murals3/bicmos8hp/simulation/mim_cap/extview.tmp -w /home/rhome/murals3/bicmos8hp/simulation/mim_cap -cdslib /home/rhome/murals3/bicmos8hp/cds.lib

@(#)$CDS: rcxToDfII version av4.1:Production:dfII6.1.3:IC6.1.3.500.10 06/09/2009 14:46 (sfrh259) $

sub-version 4.1, integ signature 2009-06-09-1330

run on rs-02.ecse.rpi.edu from /cad/cds/assura4.1-613/tools.lnx86/assura/bin/32bit/rcxToDfII on Thu Nov 14 14:02:59 2013

Loading IBM PDK bicmos8hp Procedures

IBM PDK bicmos8hp Device Status table loaded.

INFO (LBRCXU-114): Finished /cad/cds/assura4.1-613/tools/assura/bin/rcxToDfII

INFO (LBRCXM-642): Constructing the RCX run script

Forking: /cad/cds/ext9.14/tools/extraction/bin/32bit//capgen -substrate_stamping_off -techdir /cad/cds/IBM_PDK/bicmos8hp/V1.4.1.3HP/Assura/QRC/411 -lvs /home/rhome/murals3/bicmos8hp/simulation/mim_cap.xcn -p2lvs /cad/cds/IBM_PDK/bicmos8hp/V1.4.1.3HP/Assura/QRC/411/qrcTechFile -sw3d -encrypt -cap_ground_layer substrate -auto_reorder_off -exclude_gate_res -cap_unit 1 -canonical_res_caps -p PC,allGate,RX -length_units meters -lexclude PC -add_via_effect M1,RX -dsub ns,nw,pwell,well,RF_BULK,substrate -blocking CPW1_AM,STI_GOX,AM -blocking CPW1_LY,STI_GOX,LY -blocking CPW1_M1,STI_GOX,M1 -blocking CPW1_M2,STI_GOX,M2 -blocking CPW1_M4,STI_GOX,M4 -blocking CPW1_MQ,STI_GOX,MQ -blocking CPW2_AM,STI_GOX,AM -blocking CPW2_LY,STI_GOX,LY -blocking CPW2_M1,STI_GOX,M1 -blocking CPW2_M2,STI_GOX,M2 -blocking CPW2_M3,STI_GOX,M3 -blocking CPW2_M4,STI_GOX,M4 -blocking CPW2_MQ,STI_GOX,MQ -blocking DI_VPNP,STI_GOX,RX -blocking Gate:0.23,STI_GOX,RX,PC -blocking IND_AM_DT,STI_GOX,AM,LY -blocking IND_AM_M1:3.48,STI_GOX,M1,AM,LY -blocking RF_BULK,STI_GOX,RX,PC,M1 -blocking SYMIND_AM_CT_DT,STI_GOX,AM,LY,MQ -blocking SYMIND_AM_CT_M1:3.48,STI_GOX,M1,AM,LY,MQ -blocking SYMIND_AM_DT,STI_GOX,AM,LY -blocking SYMIND_AM_M1:3.48,STI_GOX,M1,AM,LY -blocking TL1_AM_LY,STI_GOX,LY,AM -blocking TL1_AM_M1,STI_GOX,M1,M2,M3,M4,MQ,LY,AM -blocking TL1_AM_M2,STI_GOX,M2,M3,M4,MQ,LY,AM -blocking TL1_AM_M3,STI_GOX,M3,M4,MQ,LY,AM -blocking TL1_AM_M4,STI_GOX,M4,MQ,LY,AM -blocking TL1_AM_MQ,STI_GOX,MQ,LY,AM -blocking TL1_LY_M1,STI_GOX,M1,M2,M3,M4,MQ,LY -blocking TL1_LY_M2,STI_GOX,M2,M3,M4,MQ,LY -blocking TL1_LY_M3,STI_GOX,M3,M4,MQ,LY -blocking TL1_LY_M4,STI_GOX,M4,MQ,LY -blocking TL1_LY_MQ,STI_GOX,MQ,LY -blocking TL1_M2_M1,STI_GOX,M1,M2 -blocking TL1_M4_M1,STI_GOX,M1,M2,M3,M4 -blocking TL1_M4_M2,STI_GOX,M2,M3,M4 -blocking TL1_M4_M3,STI_GOX,M3,M4 -blocking TL1_MQ_M1,STI_GOX,M1,M2,M3,M4,MQ -blocking TL1_MQ_M2,STI_GOX,M2,M3,M4,MQ -blocking TL1_MQ_M3,STI_GOX,M3,M4,MQ -blocking TL1_MQ_M4,STI_GOX,M4,MQ -blocking TL2_AM_LY,STI_GOX,LY,AM -blocking TL2_AM_M1,STI_GOX,M1,M2,M3,M4,MQ,LY,AM -blocking TL2_AM_M2,STI_GOX,M2,M3,M4,MQ,LY,AM -blocking TL2_AM_M3,STI_GOX,M3,M4,MQ,LY,AM -blocking TL2_AM_M4,STI_GOX,M4,MQ,LY,AM -blocking TL2_AM_MQ,STI_GOX,MQ,LY,AM -blocking TL2_LY_M1,STI_GOX,M1,M2,M3,M4,MQ,LY -blocking TL2_LY_M2,STI_GOX,M2,M3,M4,MQ,LY -blocking TL2_LY_M3,STI_GOX,M3,M4,MQ,LY -blocking TL2_LY_M4,STI_GOX,M4,MQ,LY -blocking TL2_LY_MQ,STI_GOX,MQ,LY -blocking TL2_M2_M1,STI_GOX,M1,M2 -blocking TL2_M3_M1,STI_GOX,M1,M2,M3 -blocking TL2_M3_M2,STI_GOX,M2,M3 -blocking TL2_M4_M1,STI_GOX,M1,M2,M3,M4 -blocking TL2_M4_M2,STI_GOX,M2,M3,M4 -blocking TL2_M4_M3,STI_GOX,M3,M4 -blocking TL2_MQ_M1,STI_GOX,M1,M2,M3,M4,MQ -blocking TL2_MQ_M2,STI_GOX,M2,M3,M4,MQ -blocking TL2_MQ_M3,STI_GOX,M3,M4,MQ -blocking TL2_MQ_M4,STI_GOX,M4,MQ -blocking am_transmission,STI_GOX,AM -blocking bend90AM,AM,LY -blocking bend90AM,AM,LY,M1 -blocking bend90AM,AM,LY,M2 -blocking bend90AM,AM,LY,M3 -blocking bend90AM,AM,LY,M4 -blocking bend90AM,AM,LY,MQ -blocking bend90LY,LY,M1 -blocking bend90LY,LY,M2 -blocking bend90LY,LY,M3 -blocking bend90LY,LY,M4 -blocking bend90LY,LY,MQ -blocking bend90M2,M2,M1 -blocking bend90M3,M3,M1 -blocking bend90M3,M3,M2 -blocking bend90M4,M4,M1 -blocking bend90M4,M4,M2 -blocking bend90M4,M4,M3 -blocking bend90MQ,MQ,M1 -blocking bend90MQ,MQ,M2 -blocking bend90MQ,MQ,M3 -blocking bend90MQ,MQ,M4 -blocking bondPad_top:6.0,STI_GOX,RX,M1,AM -blocking IND_AC_WIRE,STI_GOX,RX,M1,AM -blocking diff_ha_var_dev,STI_GOX,RX -blocking diff_ncap,STI_GOX,RX,PC,M1 -blocking gap1AM,AM,M4 -blocking gap1AM,AM,MQ -blocking ha_var_dev,STI_GOX,RX -blocking lange1LY,LY,M3 -blocking mim1_bot:2.0,LY,QY,HY,AM -blocking mim2_bot,LY,QY,HY,AM -blocking ncap_dev,STI_GOX,RX,PC,M1 -blocking ncap_dgx,STI_GOX,RX,PC,M1 -blocking npn_dev_0P20:0.52,STI_GOX,RX,M1 -blocking npn_dev_0P20CBE:0.52,STI_GOX,RX,M1 -blocking npn_dev_0P20CBEt:0.52,STI_GOX,RX,M1 -blocking npn_dev_0P20_HB:0.52,STI_GOX,RX,M1 -blocking npn_dev_0P20_HBt:0.52,STI_GOX,RX,M1 -blocking npn_dev_0P20t:0.52,STI_GOX,RX,M1 -blocking open1AM,AM,M4 -blocking open1AM,AM,MQ -blocking pfRF_dev:1.89,STI_GOX,RX,PC,M1 -blocking pfRF_dev_HV:1.89,STI_GOX,RX,PC,M1 -blocking pfRF_mul:1.89,STI_GOX,RX,PC,M1 -blocking pfRF_mul_HV:1.89,STI_GOX,RX,PC,M1 -blocking res8pc_dev:0.25,STI_GOX,RX,PC -blocking res8pc_term:0.25,STI_GOX,RX,PC -blocking res8rr_dev:0.4,STI_GOX,RX,PC -blocking rns8pc_dev:2.46,STI_GOX,RX,PC -blocking rns8rr_dev:2.46,STI_GOX,RX,PC -blocking rnw8pc_dev:0.25,STI_GOX,RX,PC -blocking rnw8rr_dev:0.4,STI_GOX,RX,PC -blocking rpw8pc_dev:0.25,STI_GOX,RX,PC -blocking rstub1AM,AM,M4 -blocking rstub1AM,AM,MQ -blocking shrt1AM,AM,M4 -blocking shrt1AM,AM,MQ -blocking singleCPW3,STI_GOX,M3 -blocking singleEnd3,STI_GOX,M1,M3 -blocking singleEnd3,STI_GOX,M2,M3 -blocking step180AM,AM,M4 -blocking step180AM,AM,MQ -blocking taper1AM,AM,M4 -blocking taper1AM,AM,MQ -blocking tee3AM,AM,M4 -blocking tee3AM,AM,MQ -blocking vpnp_coll,M1,M2 -blocking vpnp_dev,STI_GOX,RX,M1 -blocking yjnct3AM,AM,M4 -blocking yjnct3AM,AM,MQ -res_blocking CPW1_AM,am -res_blocking CPW1_LY,ly -res_blocking CPW1_M1,m1_parasitic -res_blocking CPW1_M2,m2_parasitic -res_blocking CPW1_M4,m4 -res_blocking CPW1_MQ,mq -res_blocking CPW2_AM,am -res_blocking CPW2_LY,ly -res_blocking CPW2_M1,m1_parasitic -res_blocking CPW2_M2,m2_parasitic -res_blocking CPW2_M3,m3 -res_blocking CPW2_M4,m4 -res_blocking CPW2_MQ,mq -res_blocking DI_VPNP:0.12,m1_parasitic -res_blocking IND_AM_DT,am,ly -res_blocking IND_AM_M1:3.48,m1_parasitic,am,ly -res_blocking SYMIND_AM_CT_DT,am,ly,mq -res_blocking SYMIND_AM_CT_M1:3.48,m1_parasitic,am,ly,mq -res_blocking SYMIND_AM_DT,am,ly -res_blocking SYMIND_AM_M1:3.48,m1_parasitic,am,ly -res_blocking TL1_AM_LY,ly,am -res_blocking TL1_AM_M1,m1_parasitic,m2_parasitic,m3,m4,mq,ly,am -res_blocking TL1_AM_M2,m2_parasitic,m3,m4,mq,ly,am -res_blocking TL1_AM_M3,m3,m4,mq,ly,am -res_blocking TL1_AM_M4,m4,mq,ly,am -res_blocking TL1_AM_MQ,mq,ly,am -res_blocking TL1_LY_M1,m1_parasitic,m2_parasitic,m3,m4,mq,ly -res_blocking TL1_LY_M2,m2_parasitic,m3,m4,mq,ly -res_blocking TL1_LY_M3,m3,m4,mq,ly -res_blocking TL1_LY_M4,m4,mq,ly -res_blocking TL1_LY_MQ,mq,ly -res_blocking TL1_M2_M1,m1_parasitic,m2_parasitic -res_blocking TL1_M4_M1,m1_parasitic,m2_parasitic,m3,m4 -res_blocking TL1_M4_M2,m2_parasitic,m3,m4 -res_blocking TL1_M4_M3,m3,m4 -res_blocking TL1_MQ_M1,m1_parasitic,m2_parasitic,m3,m4,mq -res_blocking TL1_MQ_M2,m2_parasitic,m3,m4,mq -res_blocking TL1_MQ_M3,m3,m4,mq -res_blocking TL1_MQ_M4,m4,mq -res_blocking TL2_AM_LY,ly,am -res_blocking TL2_AM_M1,m1_parasitic,m2_parasitic,m3,m4,mq,ly,am -res_blocking TL2_AM_M2,m2_parasitic,m3,m4,mq,ly,am -res_blocking TL2_AM_M3,m3,m4,mq,ly,am -res_blocking TL2_AM_M4,m4,mq,ly,am -res_blocking TL2_AM_MQ,mq,ly,am -res_blocking TL2_LY_M1,m1_parasitic,m2_parasitic,m3,m4,mq,ly -res_blocking TL2_LY_M2,m2_parasitic,m3,m4,mq,ly -res_blocking TL2_LY_M3,m3,m4,mq,ly -res_blocking TL2_LY_M4,m4,mq,ly -res_blocking TL2_LY_MQ,mq,ly -res_blocking TL2_M2_M1,m1_parasitic,m2_parasitic -res_blocking TL2_M3_M1,m1_parasitic,m2_parasitic,m3 -res_blocking TL2_M3_M2,m2_parasitic,m3 -res_blocking TL2_M4_M1,m1_parasitic,m2_parasitic,m3,m4 -res_blocking TL2_M4_M2,m2_parasitic,m3,m4 -res_blocking TL2_M4_M3,m3,m4 -res_blocking TL2_MQ_M1,m1_parasitic,m2_parasitic,m3,m4,mq -res_blocking TL2_MQ_M2,m2_parasitic,m3,m4,mq -res_blocking TL2_MQ_M3,m3,m4,mq -res_blocking TL2_MQ_M4,m4,mq -res_blocking am_transmission,am -res_blocking bend90AM,am,ly -res_blocking bend90LY,ly,mq -res_blocking bend90M2,m2_parasitic,m1_parasitic -res_blocking bend90M3,m3,m2_parasitic -res_blocking bend90M4,m4,m3 -res_blocking bend90MQ,mq,m4 -res_blocking bondPad:6.0,m1_parasitic,am -res_blocking IND_AC_WIRE,m1_parasitic -res_blocking diff_ha_var_dev:2.48,m1_parasitic -res_blocking gap1AM,am -res_blocking ha_var_dev:1.3,m1_parasitic -res_blocking kq_term,ly -res_blocking lange1LY,ly,m3 -res_blocking mim1_bot:2.0,ly,am -res_blocking mim2_bot,ly,am -res_blocking open1AM,am -res_blocking res8n_term:0.02,m1_parasitic -res_blocking res8ns_term,m1_parasitic -res_blocking res8pc_term:0.07,pc_parasitic,m1_parasitic -res_blocking res8pc_term:0.25,pc_parasitic,m1_parasitic -res_blockiINFO (LBMISC-215205):

*** Cadence Extraction QRC Techgen -trans VERSION 9.1 Linux 32 bit - (Wed Sep 15 09:10:11 PDT 2010) ***

INFO (CAPGEN-41199):

Techgen -trans results will be written to directory: /home/rhome/murals3/bicmos8hp/simulation/mim_cap

WARNING (CAPGEN-41242): [input]: Via effect is already described in process file. -add_via_effect is obsolete and will be ignored.

WARNING (RCXSPIC-27116): There are no non-empty MOS/LDD devices with diffusion layer 'RX' and poly layer 'PC'. Cannot perform gate capacitance blocking for user-specified layer 'allGate'.

ng rstub1AM,am -res_blocking shrt1AM,am -res_blocking singleCPW3,m3 -res_blocking singleEnd3,m2_parasitic,m3 -res_blocking step180AM,am -res_blocking taper1AM,am -res_blocking tee3AM,am -res_blocking yjnct3AM,am /home/rhome/murals3/bicmos8hp/simulation/mim_cap

Successfully created RCX script '/home/rhome/murals3/bicmos8hp/simulation/mim_cap/rcx.sh'

INFO (LBRCXM-581): Checked out '1' license(s) for Virtuoso_QRC_Extraction_L 3.10

INFO (LBRCXM-608): Executing command

/bin/ksh /home/rhome/murals3/bicmos8hp/simulation/mim_cap/rcx.sh

##=======================================================

##ADD_EXPLICIT_VIAS=N

##ADD_BULK_TERMINAL=N

##AGDS_FILE=/dev/null

##AGDS_LAYER_MAP_FILE=/dev/null

##HCCI_DEV_PROP_FILE=/dev/null

##AGDS_SPICE_FILE=/dev/null

##AGDS_TEXT_LAYERS=

##ARRAY_VIAS_SPACING=

##ASSURA_RUN_DIR=/home/rhome/murals3/bicmos8hp/simulation

##ASSURA_RUN_NAME=mim_cap

##BLACK_BOX_CELLS=/dev/null

##BREAK_WIDTH=

##CAP_COUPLING_FACTOR=1.0

##CAP_EXTRACT_MODE=decoupled

##CAP_GROUND=gnd

##CAP_MODELS=no

##DANGLINGR=N

##DEVICE_FINGER_DELIMITER='@'

##DF2=Y

##DRACULA_RUN_DIR=

##DRACULA_RUN_NAME=

##ENABLESENSITIVITYEXTRACTION=N

##EXCLUDE_FLOAT_LIMIT=

##EXCLUDE_FLOAT_DECOPULING_FACTOR=

##EXCLUDE_FLOATING_NETS=N

##EXCLUDE_NETS_REDUCERC=/dev/null

##EXCLUDE_SELF_CAPS=N

##IGNORE_GATE_DIFFUSION_FRINGING_CAP=Y

##EXTRACT=both

##EXTRACT_MOS_DIFFUSION_AP=N

##EXTRACT_MOS_DIFFUSION_HIGH=

##EXTRACT_MOS_DIFFUSION_RES=N

##FILTER_SIZE=2.0

##FIXED_NETS_FILE=/dev/null

##FMAX=

##FRACTURE_LENGTH_UNITS=MICRONS

##FREQUENCY_FILE=/dev/null

##GROUND_NETS=

##GROUND_NETS_FILE=/dev/null

##HCCI_DEV_PROP=7

##HCCI_INST_PROP=6

##HCCI_NET_PROP=5

##HCCI_RULE_FILE=

##HCCI_RUN_DIR=

##HCCI_RUN_NAME=

##HEADER_FILE=/dev/null

##HIERARCHY_DELIMITER='/'

##HRCX_CELLS_FILE=/dev/null

##IMPORT_GLOBALS=Y

##LADDER_NETWORK=N

##LVS_SOURCE=assura

##M_FACTORR=

##M_FACTORW=N

##MACRO_CELL=Y

##MAX_FRACTURE_LENGTH=infinite

##MAX_SIGNALS=

##MERGE_PARALLEL_R=N

##MINC=

##MINC_BY_PERCENTAGE=

##MINR=0.001

##NET_NAME_SPACE=layout

##NETS_FILE=/dev/null

##OUTPUT=/home/rhome/murals3/bicmos8hp/simulation/mim_cap/extview.tmp

##OUTPUT_NET_NAME_SPACE=layout

##PARASITIC_BLOCKING_DEVICE_CELLS_TYPEgray

##PARASITIC_CAP_MODELS=no

##PARASITIC_RES_MODELS=no

##PARASITIC_RES_LENGTH=N

##PARASITIC_RES_WIDTH=N

##PARASITIC_RES_WIDTH_DRAWN=N

##PARASITIC_RES_UNIT=N

##PARTIAL_CAP_BLOCKING=N

##PEEC=N

##PIN_ORDER_FILE=/dev/null

##PIPE_ADVGEN=

##PIPE_SPICE2DB=

##POWER_NETS=

##POWER_NETS_FILE=/dev/null

##RC_FREQUENCY=

##RCXDIR=/home/rhome/murals3/bicmos8hp/simulation/mim_cap

##RCXFS_HIGH=N

##RCXFS_NETS_FILE=/dev/null

##RCXFS_TYPE=none

##RCXFS_CUTOFF_DISTANCE=

##RCXFS_VIA_OFF=N

##REDUCERC=N

##REGION_LIMIT=

##RES_MODELS=no

##RISE_TIME=

##SAVE_FILL_SHAPES=N

##SINGLE_CAP_EDSPF=N

##SHOW_DIODES=N

##SKIN_FREQUENCY=

##SPEF=N

##SPEF_UNITS=

##SPLIT_PINS=N

##SPLIT_PINS_DISTANCE=

##SUB_NODE_CHAR='#'

##SUBSTRATE_PROFILE=/dev/null

##SUBSTRATE_STAMPING_OFF=Y

##TEMPDIR=/home/rhome/murals3/bicmos8hp/simulation/mim_cap/rcx_temp

##TEMPERATURE=25.0

##TYPE=full

##USER_REGION=/dev/null

##VARIANT_CELL_FILE=/dev/null

##VIA_EFFECT_OFF=Y

##VIRTUAL_FILL=

##XREF=/dev/null,/dev/null

##XY_COORDINATES=c,r

##=======================================================

CASE_SENSITIVE=TRUE

export CASE_SENSITIVE

TEMPDIR=`setTempDir /home/rhome/murals3/bicmos8hp/simulation/mim_cap/rcx_temp`

setTempDir /home/rhome/murals3/bicmos8hp/simulation/mim_cap/rcx_tempexport TEMPDIR

DEVICE_FINGER_DELIMITER='@'

HIERARCHY_DELIMITER='/'

cd /home/rhome/murals3/bicmos8hp/simulation/mim_cap

cat <<ENDCAT> caps2dversion

* caps2d version: 10

ENDCAT

cat <<ENDCAT> flattransUnit.info

meters

ENDCAT

QRC=Y

export QRC

cat <<ENDCAT> topcellxcn.info

/home/rhome/murals3/bicmos8hp/simulation/mim_cap.xcn

ENDCAT

#==========================================================#

# Generate RCX input data from Assura LVS database

#==========================================================#

GOALIE2DIR=/cad/cds/ext9.14/tools/extraction/bin

export GOALIE2DIR

vdbToRcx /home/rhome/murals3/bicmos8hp/simulation mim_cap -unit meters -- -V1 \

-H satfile -r /home/rhome/murals3/bicmos8hp/simulation/mim_cap.xcn \

-df2 -xgl

@(#)$CDS: vdbToRcx version av4.1:Production:dfII6.1.3:IC6.1.3.500.10 06/09/2009 14:47 (sfrh259) $

6.2 Linux 32 bit - (Thu Feb 12 19:29:42 PST 2009)

Opening LVS data for mim_cap in /home/rhome/murals3/bicmos8hp/simulation

Open time is 0.0 sec.

Build pins/attributes took 0.2 sec.

Processing AM_pin_text 1 shapes 0.0 sec.

Processing LY_pin_text 1 shapes 0.0 sec.

Processing M1_pin_text 1 shapes 0.0 sec.

create satfile took 0.05 user, 0.00 sys, 1.00 elapsed, 134704.0 kbytes

write edge AM_pin_text took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

write edge LY_pin_text took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

write edge M1_pin_text took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

Building net map file.0.0 sec.

create netmap file took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

create net file took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

WARNING (LBCLV-5652): No mosfet models provided. Can't create transfile

WARNING (LBCLV-5663): No bipolar models provided. Can't create bipolar files

WARNING (LBCLV-5660): No resistor models provided. Can't create resistor files

WARNING (LBCLV-5657): No diode models provided. Can't create diode files

Device creation took 0.0 sec

Processing mim1_bot_via 1 shapes 0.0 sec.

write edge mim1_bot_via took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

Processing mim1_top_via 1 shapes 0.0 sec.

write edge mim1_top_via took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

Processing ca6 2 shapes 0.0 sec.

write edge ca6 took 0.01 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

write edge sub_dev_Device_98 took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

write edge mim1dt_Device_69 took 0.00 user, 0.01 sys, 0.00 elapsed, 134852.0 kbytes

Processing sub_dev_Device_98 1 shapes 0.0 sec.

Processing mim1dt_Device_69 1 shapes 0.0 sec.

Processing subs_ndt 1 shapes 0.0 sec.

write edge subs_ndt took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

Processing m1_parasitic 1 shapes 0.0 sec.

write edge m1_parasitic took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

Processing m1 1 shapes 0.0 sec.

write edge m1 took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

Processing ly 1 shapes 0.0 sec.

write edge ly took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

Processing am 1 shapes 0.0 sec.

write edge am took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

write edge transmission took 0.00 user, 0.00 sys, 0.00 elapsed, 134852.0 kbytes

Processing transmission 0 shapes 0.0 sec.

Processing mim1_bot 1 shapes 0.0 sec.

write edge mim1_bot took 0.00 user, 0.00 sys, 0.00 elapsed, 135036.0 kbytes

Processing mim1_top 1 shapes 0.0 sec.

write edge mim1_top took 0.00 user, 0.00 sys, 0.00 elapsed, 135168.0 kbytes

Processing substrate_text 1 shapes 0.0 sec.

write edge substrate_text took 0.00 user, 0.00 sys, 0.00 elapsed, 135300.0 kbytes

Processing substrate 1 shapes 0.0 sec.

write edge substrate took 0.00 user, 0.00 sys, 0.00 elapsed, 135432.0 kbytes

Processing sub_diff_top 1 shapes 0.0 sec.

write edge sub_diff_top took 0.00 user, 0.00 sys, 0.00 elapsed, 135564.0 kbytes

write edge bperi took 0.00 user, 0.00 sys, 0.00 elapsed, 135696.0 kbytes

WARNING (LBCLV-5576): Ignoring duplicate layer-generation request of bperi (id 18)

write edge dpo took 0.00 user, 0.00 sys, 0.00 elapsed, 135696.0 kbytes

WARNING (LBCLV-5576): Ignoring duplicate layer-generation request of dpo (id 20)

WARNING (LBCLV-5576): Ignoring duplicate layer-generation request of bperi (id 18)

Processing bperi 0 shapes 0.0 sec.

Processing dpo 0 shapes 0.0 sec.

Processing bperi 0 shapes 0.0 sec.

sort edges took 0.01 user, 0.07 sys, 0.00 elapsed, 3964.0 kbytes

sort labels took 0.00 user, 0.01 sys, 0.00 elapsed, 3868.0 kbytes

sort edges and labels took 0.04 user, 0.10 sys, 0.00 elapsed, 135436.0 kbytes

vdbToRcx System Usage:

Elapsed: 1 seconds.

CPU: 0.3 seconds

Memory 66 Meg

GOALIE2DIR=/cad/cds/ext9.14/tools/extraction/bin/32bit/

export GOALIE2DIR

#==========================================================#

# Generate power list

#==========================================================#

cat global.net > power_list

#==========================================================#

# Prepare resistance blocking layers

#==========================================================#

grow -V -m 2.0 mim1_bot g_1_mim1_bot

grow took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5780.0 kbytes

geom ly g_1_mim1_bot - ly__c,11,i,1

geom ly g_1_mim1_bot - ly,10,i,1

geom am g_1_mim1_bot - am__c,11,i,1

geom am g_1_mim1_bot - am,10,i,1

#==========================================================#

# Create ports for abutment

#==========================================================#

geom -C am - am,1,i,1

geom -C am__c - am__c,1,i,1

inter am am__c -t am_am__c_butt:edge

geom -C ly - ly,1,i,1

geom -C ly__c - ly__c,1,i,1

inter ly ly__c -t ly_ly__c_butt:edge

/bin/mv -f substrate substrate_orig

epick substrate_orig substrate

/bin/mv -f substrate_text substrate_text_orig

epick substrate_text_orig substrate_text

/bin/mv -f subs_ndt subs_ndt_orig

epick subs_ndt_orig subs_ndt

#==========================================================#

# Ensure vias do not extend beyond routing

#==========================================================#

geom -V ca6 m1_parasitic sub_diff_top - ca6_m1_parasitic_sub_diff_top,111,i,2

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5872.0 kbytes

geom -V mim1_bot_via mim1_bot ly - mim1_bot_via_mim1_bot_ly,111,i,2

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5784.0 kbytes

geom -V mim1_top_via mim1_top am - mim1_top_via_mim1_top_am,111,i,2

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5784.0 kbytes

geom -V substrate substrate_text - substrate_substrate_text_ovia,11,i,1

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5784.0 kbytes

geom -V subs_ndt substrate - subs_ndt_substrate_ovia,11,i,1

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5784.0 kbytes

geom -V mim1_bot_via mim1_bot ly__c - mim1_bot_via_mim1_bot_ly__c,111,i,2

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5872.0 kbytes

geom -V mim1_top_via mim1_top am__c - mim1_top_via_mim1_top_am__c,111,i,2

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5872.0 kbytes

geom -V am am_am__c_butt - am_am_am__c_butt_ovia,11,i,1

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5784.0 kbytes

geom -V am__c am_am__c_butt - am__c_am_am__c_butt_ovia,11,i,1

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5784.0 kbytes

geom -V ly ly_ly__c_butt - ly_ly_ly__c_butt_ovia,11,i,1

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5784.0 kbytes

geom -V ly__c ly_ly__c_butt - ly__c_ly_ly__c_butt_ovia,11,i,1

geom took 0.00 user, 0.00 sys, 0.00 elapsed, 5784.0 kbytes

/bin/mv -f substrate_orig substrate

/bin/mv -f substrate_text_orig substrate_text

/bin/mv -f subs_ndt_orig subs_ndt

#==========================================================#

# Flatten net file, routing, via and device layers

#==========================================================#

SAVEDIR=`beginFlattenInputs`

beginFlattenInputsexport SAVEDIR

/bin/mv -f NET h_NET

flatnet -V -li -h '/' h_NET NET

flatnet took 0.00 user, 0.00 sys, 0.00 elapsed, 5620.0 kbytes

netprint -V -N1 power_list:power_list_nums NET

flattenCapData mim1dt_Device_69 meters

flattub took 0.00 user, 0.00 sys, 0.00 elapsed, 5576.0 kbytes

flatnet took 0.00 user, 0.00 sys, 0.00 elapsed, 5616.0 kbytes

flattrans took 0.00 user, 0.00 sys, 0.00 elapsed, 5612.0 kbytes

flattenDeviceData BOX meters

flattrans took 0.00 user, 0.00 sys, 0.00 elapsed, 5600.0 kbytes

flattenLayers -m ca6 mim1_bot_via mim1_top_via am mim1_top ly m1_parasitic \

substrate ca6_m1_parasitic_sub_diff_top sub_diff_top \

mim1_bot_via_mim1_bot_ly mim1_bot mim1_top_via_mim1_top_am \

substrate_substrate_text_ovia substrate_text subs_ndt_substrate_ovia \

subs_ndt mim1_bot_via_mim1_bot_ly__c ly__c \

mim1_top_via_mim1_top_am__c am__c am_am_am__c_butt_ovia am_am__c_butt \

am__c_am_am__c_butt_ovia ly_ly_ly__c_butt_ovia ly_ly__c_butt \

ly__c_ly_ly__c_butt_ovia sub_dev_Device_98 m1

flattub took 0.05 user, 0.14 sys, 3.00 elapsed, 5580.0 kbytes

endFlattenInputs

#==========================================================#

# Initialize CAP_GROUND variable

#==========================================================#

CAP_GROUND=`findCapGround -g gnd -l substrate NET`

findCapGround -g gnd -l substrate NETecho "CAP_GROUND=" ${CAP_GROUND}

CAP_GROUND= 1

export CAP_GROUND

#==========================================================#

# Segregate interconnect into resistive and non-resistive

#==========================================================#

selectNetsByNumber power_list_nums am p_ram np_ram