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Probe Net with net name in SKILL

 Hi All, I am writing Schematic versus schematic code(not hierarchy).  I got all unmatched netnames and instances in two schematics. And I hilighted instances by geAddHilightFig() command. I want to...

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Stept through UVM code

Hi,I'm trying to step through the SV UVM library code, but I just can't manage. I tried the built in library in IUS and also a version downloaded from Accelera. Both setups have -linedebug on the...

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Problem in opening Cadence frm terminal

 Hi...;        By opening cadence icfb & , It could not be opened and getting error message like below[mudassar@vlsi58 ~]$ csh [mudassar@vlsi58 ~]$ source cadence.cshrc [mudassar@vlsi58 ~]$ icfb...

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Ground plane help

Hello,I am new to Allegro and I am struggling with creating a ground plane. For example, in the attached image, jumper J18 pin1 (a plated hole) is assigned to the GND net so I was expecting the ground...

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PAD & footprint help me I am confused

Hi, this is my firs post there,I used altium 3 year but now I need to design high frequency and impedance matching and DDR3 and etc so I changed my plane and I want to use allegro Cadence, but I have...

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Mismatch model files required for umc 180 nm process

Hi, Can anyone share with me mismatch models for umc 180nm mixed mode, regular vt process. Or, at least if anyone could tell where or how to generate or find (in case it is already included in the umc...

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How to get reference to selected instance pin

If you select an instance in your schematic, you can get a reference to it using geGetSelSet().I find this doesn't work if the selected object is an instance pin.My ultimate goal is to create a bindkey...

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Skill code to automatically map instances via name in layout xl

Sometimes the layout instances don't map with the schematic (vxl clean) even if the lvs comes clean. I have to mannualy go to device correspondance & map them. Is there any skill code that can be...

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SigNoise Errors/Warnings

Hi,All of the sudden whenever I open Cross-section and try to change Coupling Type or go to do a diff route on this particular board, an error dialog box named "SigNoise Errors/Warnings" pops up which...

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how to plot capacitance vs voltage in cadence virtuoso

Hi,I am designing VCO in cadence-virtuoso ADE L(180nm) topology is attached below where i have to know how to plot graph C Vs Voltage. Capacitance is parallel combination of two PMOS varactors (PM2 and...

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Multi point CTS implementation

I have a netlist and def with single clock port clk.I want to implement multi point cts with 4 clocks(clk1,clk2,clk3,clk4).They are equilent to clock port clk.What are the flow steps in encounter to...

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Cadence_tool_Issue

In one of my recent project.i faced some issue with cadence tool. I created a test design to explain the issue in detail.Actual issue is that the net “VCC_LOAD+” is connected to Global power net...

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ocean -nograph error

I am very new to ocean plateform and cadence tool. In my simulation, konsole screen display takes most of the time and I want to disable it. I found that "ocean -nograph" does the same. I am trying to...

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Adding library pathes

The envirnoment  creates a new cds.lib file when cadence virtuoso starts per session.Is there a better way of adding additional library pathes than creating a procedure to append the cds.lib by...

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Layout to ODB++ Export

Hello,I’m trying to export PCB build data from Orcad Layout 16.2 but the exported ODB++ files are not complete according to the board house.The help file in Orcad Layout points to a link do download...

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ac power calculation for rectifier in cadence ADE

Hi, I am designing a rectifier and need to calculate the efficiency.I have followed the below procedure:1. Designed a rectifier using MOSes with RF signal at 865MHz with a load current of 4uA.2....

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Breaking Static shape into fragments

In my current design, I need to break static shape from center. While using shape void command, I am geeting error " Can't break shape into fragments." Is there any other way around to do the same...

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Get cut layer from symbolic

How do you get the cut layer from a customVia? The syntax for stdVia does not work for customVia, ~>cutLayer. Thanks

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PSPICE - Text string problem

Hi all,What I need to is define a text parameter, and compare it with another string.below is my spice code: .SUBCKT XXX 1 2 + TEXT: Material_Name = "AL"R 1 2 {IF(Material_Name=="AL", 100, 200)}but the...

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omit / ignore parts in a BOM(BOM_IGNORE?), also label as "do not stuff"...

 I've looked at several forms/user guides/help documents and I'm unable to find the answers I'm looking for. I'm using orcad capture 16.2. I do *not* have CIS :'( 1.  Is there a straightforward way to...

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