sc_vector support
It appears that the version systemC that Cadence supplies within CtoS does not include support for sc_vector. Are there any plans to include this in the future?
View ArticleHow to preserve the internal signal name in synthesis when using Cadence RTL...
Here is part of my script.set_attribute write_vlog_preserve_net_name true elaborate aes_fwd_top ungroup -flatten -all synthesize -to_mapped write_hdl -mapped > aes_fwd_top-orig.vBut RTL compiler...
View ArticleLayout application in 16.3
Hello,I installed the16.3version oforcadsoftwareandI tried tocreate printedwith this versionoftheapplication asLayoutVersion 10circuitsbut Ican not find theLayoutapplication inthe list...
View ArticleProblem while trying to add component libraries for schematic capture in...
Hi,I was trying to do a Pspice simulation using Design Entry HDL, but I am not able to add components libraries. For eg: The tutorial says -Select analog from the list of Available Libraries, and click...
View ArticleRouting from a via
Updated to the latest service pack and I'm seeing a problem I have not run into before. Maybe I'm doing something wrong, but....Below picture shows pairs of pins routed out to vias on the top layer....
View ArticleBinding vhdl output ports and sv assertion module input ports in cadence...
Hi,Is there a way to bind vhdl outputs with my SV checker module input ports? And also how do i access vhdl ports from my sv testbench? Thanks,Rajay
View ArticleHanging issue
Hi All,In our present board while routing ground (GND) net, the tool getting slow and taking time to route every segment. But for other nets with VCC it working fine. There is no properties attached to...
View ArticlePassign commands to ncelab using irun
Hi,I'm using the irun command. I want to pass an option -binding to the ncelab. How do I do this?Thanks.
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Inner Point of a PIN
Dear All, Can anyone help me how to get the Pin inner point area if I only have the dbid of the pin.
View ArticleThermal reliefs for vias used in SMD pads
Hi all I am doing a design with via in pad for the first time and was wondering if there are any known soldering issues if you don't thermally relive the via on a plane? Normally we never put thermals...
View ArticleEngine for IFV
Hey, The automatic assertions take a very large time to run as my design is huge.Could anyone tell me which is the best engine to use so that I can fasten this process?Thanks.
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Bandgap voltage reference problems
Hello!I'm trying to make this band-gap ref. circuit to work but, up to now, i haven't reached the right result. I've already checked the circuit, but i couldn't find any misconnections on it.Can you...
View ArticleChanging Schematic Editor Search assistant's truncation limit
Hi all,I'm using the "Search" assistant in Schematic Editor. When my query returns too many matches, the Results panel shows only part of them (1000 matches, I think), and "Results truncated" is...
View ArticleOK_UNASSIGNED_SHAPE
I'm trying to find how to attach the OK_UNASSIGNED_SHAPE property to shape (see error report) (---------------------------------------------------------------------)( Shape Without Nets Report...
View ArticleEmail Subscriptions Not Working
I just realized I haven't been receiving emails (for a while) from posts to the forums I'm subscribed to. I double-checked my subscription status and it looks fine. Any ideas?
View ArticlePackage Symbol Wizard Padstack Browser selection
Hi, I'm using OrCAD PCB Editor 16.5 and trying to create a footprint. I've made the padstack for this footprint and saved it to a shared network location. When I use the Package Symbol Wizard...
View ArticleAllegro Constraint Manager
I'm wondering why the Electrical Worksheet is not appering in the Constraint Manager?
View ArticleProblems running transient noise simulation
Hi,I'm running IC6.1.4.5 and trying to run a transient noise simulation on an amplifier but can't seem to get the noise generation to work. I've simplified the test bench to an ideal current source...
View ArticleMetal Fill in Encounter Digital Implementation
Hello all,I created a big multiplexer with Cadence Encounter and it has 4 metal layers. And to avoid some MTOP DRC error I filled the Top layer with metal dummies (rectangular dummies in Metal 4...
View ArticleMaking 'reload' work on custom expressions in plot window
I created a form to help plot analog waveforms as busses in the plot (Visualization) window. When I reload it after a new simulation, I get a warning and an error:*WARNING* Symbol(s) named " 'expr_19'...
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