Verification of concurrent modules with IFV
Hi guys, This is my first post. So, I hope I'm writting it in the correct place. I need a help to verify two concurrent modules (A and B) instantiated in a top module (Top). The concurrent modules...
View ArticleOrCAD Capture 16.3 hangs on load
My OrCAD Capture 16.3 just quit working. When I load the program, I first see the version and copyright splash screen in the center of my primary monitor. Less than one second later, The main window...
View ArticlePower domains or not?
Hi all,I have to setup a chip with 5 completely separated cores. Each core has its own vcc_core/io and vdd_core/io ind i/o pins.But the actual voltage of all cores is 1.8V. For testing only one core...
View Articletest procedure in Cadence encounter test tool?
How do I write a test procedure in Cadence encounter test tool?
View Articlemacro distance
Hi All Can you please suggest me how i can find the distance among all the macros , i am writting a script in which i am inserting soft blockage if distance among macros is less than 15 microns.
View ArticleRouting differential pair with same length
I am trying to route a differential pair, but I am having trouble making each trace the same length. Is there an easy way to do this in allegro?
View ArticleHow to import spice netlist
Hi,I experience a weird problem when I import spice.When I open the schematic that was created after the import process, I see that the values of Finger_width and Width are different although there is...
View ArticleConverting the Layout Libray 9.2 to Allegro PCb Editor 16.3??
Hi.I am using the OrCAD 16.3. Me had worked fully with layout 9.2. But in my organization they told that use the Allegro PCB editor except of layout 9.2. My Problem is i want to convert my library...
View ArticleNeed someone to convert PADS to Allegro successfully
I have a design to modify, unfortunately the original is in PADS 9.3. I have Allegro 16.0 and having lots of problems trying to get it to load.Anyone out there done this before and got it to work? I...
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Stacked Via Constraint Control (Performance L Option)
Hello, I am currently working on a design that shall utilize stacked micro vias from 1 to 4 with a buried mechanical from 4 to 5 followed by stacked micro vias from 5 to 8. We cannot stack on...
View ArticlePAL simulation
I need to simulate a PAL10H8 (included in DIG_PAL.OLB library. Parts in PLD.OLBlibrary can not be simulated), but I have got this error:"ERROR -- Subcircuit PAL10H8 used by X_U1 is undefined"How can I...
View ArticleCopy command executable in read-only mode
Hi, I notice in IC6 its possible to initiate the copy command in the layout editor even though the cellview is in read-only mode, whereas the stretch or move commands sound a warning when executed in...
View ArticleHow to retrieve via spacing of a 2x2 customVia in Virtuoso?
Hi, I am trying to write a SKILL routine that increase and descrease number of vias with bindkeys. I got the routine to work with stdVia but I am running into some problems with customVias. In...
View ArticleSaving a layout to a file using SKILL code
I need to save a backup copy of a layout to a software-selected file using SKILL code - how do I do that?
View ArticleCreating a WEEE wheelie bin logo with logomaker
Hi,I'm trying to make a WEEE logo with logomaker, it is importing ok, but I'm just getting the outline of parts that should be solid, for example the black bar at the bottom and the cross.Is there a...
View ArticleObject occupying a point
Is there any way to tell if an object, say for example it is a metal object, actually occupies a given point (as opposed to surrounding it like a U or O shape). The bounding box cannot be used because...
View ArticleDefining grid Problem?
Hi..I had kept the grid size of Non etch as 0.127mm and Etch also 0.127mm. But when i give OK command means the etch gird values are get vanished from it. I don't know why??Can anyone provide me the...
View ArticleSilk text allignment
Hi eDaveI heard a lot of good stuffs from many people about your skill program - nice job, i got a quiery which i can put on this forum, would it be possilble to align silk text automatically without...
View ArticleHow to use BSIM-CMG models to build and simulate FinFET circuits
Hi All,I need to simulate FinFET based circuits I have BSIM-CMG codes and models from http://www-device.eecs.berkeley.edu/bsim/?page=BSIMCMG_LR this includes veriloga files.va and files.include and...
View ArticleLink C++ - SKILL
hi, Could someone explain to me how to make a link between C++ and SKILL?I have to develop a program in SKILL. But I do some text treatment in C++. So how I can load my SKILL program, and then lunch my...
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