Dear all,
I'm using VerilogA model in my design in Cadence, I have some variables in the model that should be changed with time, actually I have two questions:
1- Is there a way to display the value of those variables during the analog simulation? I was looking for VerilogA compiler to test my code first but I didn't find, can some one suggest me a website or any information?
2- The statement of @(initial_step), does it mean the command after it will be exceuted only one time, which is the begining of the simulation?
Thank you in advance,